Multilayer PCB


Multilayer PCB can be any layer count but rely on conventional drilling and plating technology.

  • Multilayer PCB up to 40+ layers
  • Wide range of laminate options including high temperature, low loss, and lead-free laminates
  • Mixed dielectric (hybrid) constructions
  • Panel size up to 30″x 55″
  • Embedded coin or metal core and metal-backed MLB
  • Panel thickness up to.450″
  • RF and microwave circuits
  • Heavy copper (10 oz. outer layer / 5 oz.
    inner layer)
  • Embedded, distributed and discrete passive components


Highfive Multilayer PCB

Highfive Multilayer PCB

How to Design for Double & Multilayer PCB?

1. Demand Analysis for Double & Multilayer PCB

A. Before the design, we should have an overall understanding of multilayer PCB, make clear the functions that hardware can carry, and understand the functions of each part of the circuits.

B. Before starting the design, we must spend a lot of time reading the datasheets of the relevant chips on the multilayer PCB board to understand the chip working mode, signal crosstalk, heat dissipation, power supply, and other specific design requirements.

C. To Clear the relationship between chips, different chips will have different combinations to complete different work.

D. In stack design, some designs of multilayer PCB have high-speed signals, and impedance matching needs to be completed in advance. Stack design, routing width, differential pair impedance matching, and antenna impedance matching need to be made clear in advance.

2. Schematic Diagram for Double & Multilayer PCB

A. After understanding the multilayer PCB requirements, start to design multilayer PCB. Once the product appearance and structure are determined, the multilayer PCB structure file will be determined, which can not be modified in the future or very small.

B. With the Multilayer PCB structure file, some special devices will quickly determine the location, such as buttons, indicators, display, power, touch, input and output interfaces, etc.

C. After all these devices and interfaces are determined, the multilayer PCB device specifications and packages shall be determined.

D. Start to build and load the 3D model, so as to visually verify whether there is interference in all components. It is impossible to use the 3D model to consult all the time in the design process. Therefore, for some chips, auxiliary lines need to be drawn on the board to help the subsequent design. Generally, lines are drawn on the mechanical layer.

E. Firstly, it is to determine the locations of peripheral devices. Other device positions of the layout can be well planned.

F. In the case of the peripheral device, locations are confirmed and placed, the layout and placement of the remaining devices need to be combined with the signal transmission direction, signal interference intensity, chip heating degree to determine the specific placement of devices.

G. The direction of signal transmission mainly is to be considered for the routing of multiple signal lines and clock lines. Through board analysis, it is better to go straight without turning over layers, avoiding 90 ° winding.

H.Signal interference is mainly input signal and output signal, analog signal and digital signal, power filter and the signal must leave a certain distance, so as to ensure that the board signal is not distorted.

I. Chip cooling is mainly for power chips and some high-power chips, which should be placed on the edge of the board as far as possible and fixed at the position of the via.

It is better to place bare copper on the edge of the board to increase the contact area between the board and the shell for cooling.

In addition to the location in favor of heat dissipation, pay attention to the layout and wiring around the chip. do not need place devices on the back of the chip to ensure that heat dissipation vias can be placed under it.

It is better to have a large area of grounding copper around and on the back of the device.

J.After the approximate position is determined, in order to make the board beautiful appearance, it is necessary to adjust the chip by coordinate movement according to the size and shape of the chip.

It is not necessary to align the center, but it must be neat and look comfortable. After determining the position, lock the chip in a fixed position. The LED lamp for debugging shall be placed on the front, so that the debugging engineers can understand the working state of this product.

3. Layout for Double & Multilayer PCB

A. After the Schematic Diagram was completed, the whole board should be conducted for layout, which is the most time consuming and important part of multilayer PCB design.

B. First of all, it must be mentioned that some antennas and differential pairs need impedance matching. Therefore, before the layout, it should be marked out and carried out firstly.

Impedance matching sometimes needs to dig copper. at the same time, it is necessary to avoid layout wire under digging copper, so as to avoid cross-talk of different signals.

C. Secondly, the power supplement parts. Because it is a multi-layer board, we are used to drawing a plane as the power supply plane, which can ensure the continuity of the power supplement and the ability to carry current.

D. Generally, the power supplement is divided from the main power supplement through rectification and filtering into multiple power supplements for different chips to work.

Therefore, when layout the distribution of the power cord, firstly, you can layout the main power supplement into the board, and then spread out from the center to the outside parts, so as to ensure that each power supplement has sufficient power source.

E. The power plane is divided into some parts according to the demand, and the chip is powered by the power plane. At the same time, we need to complete the DC filter design of all chip pins. Many chip power supply pins need a DC filter, which should be considered in the design of a powder supplement.

G. After the completion of such a layout of a power supplement, The power will be provided for all chips after the power part is connected. The power plane also needs to be DC filtered at a certain distance between the forked intersection and the main road to ensure the purity of the power plane.

H. After the power supplement layout is finished, the differential pair shall be placed away from other signal lines to avoid coupling. At the same time, a certain position should be reserved for the equal length between pairs and within pairs. Among them, the equal length between pairs can be adjusted according to the chip requirements.

The equal length within the team must be strictly controlled, and the equal length gap should be less than 5 MIL. No matter the equal length in the pairs or between pairs, try to be in the places where the length does not match, such as corners, exits, etc., so as to ensure that most of the line routes are in the equal length state.

I. At the end of the above layout, the local circuit is started to go through. It is suggested that in this part, one circuit module should go through all before the other parts. When wire layout, it needs to be all through, especially the grounding pin, according to the principle that one pin corresponds to one grounding hole.

If it needs to be adjusted later, it needs to be adjusted again to avoid that the board is too dense to be grounded or the grounding needs to be long-distance wiring. The through-hole placement needs to be placed between the pads to avoid oblique angle wiring. The through-hole can not be punched on the pad, which will affect the through-hole successful rate.

J. During the layout, attention should be paid to an analog signal and a clock signal, which should be at least 3W Rule away from other signals to avoid signal interference caused by long-distance equal length routing with other signals. At the same time, if these important signals need to go to the inner layer, it is necessary to find the nearest inner layer.

What’s 3W?

In order to ensure that the distance between lines is large enough, when the distance between lines and the center of lines is not less than 3 times of the line width, if the distance between lines is not less than 3 times of the line width, 70% of the electric fields between lines can be kept without mutual interference, which is called 3W rule. To achieve a 98% electric field without mutual interference, a 10 W rule can be used.

The 3W principle is also related to the physical factors of the circuit board. Considering the physical significance of cross-talk, cross-talk should be prevented effectively. The distance is related to stack height and line width.

3W is enough for the height distance between the line and the reference plane (5-10 mils) of the four-layer plate.

However, for the two-layer board, the distance between the routing and the height of the reference layer (45-55 mils), 3W routing may not be enough for high-speed signals.

The 3W principle is generally established under the condition of 50 ohm characteristic impedance transmission line

4. Part Layout Adjustment for Double & Multilayer PCB

A. After all signal wires had been for layout including ground wires and all had been connected, they need to be adjusted locally according to the engineer’s habits.

The local adjustment is mainly to put the chip position in the order and optimize the placement of resistance and capacitance position in combination with relevant data.

B. In the power supplement part, the power supplement of the feedback circuit should be as short as possible, and the length of the device should be used to shorten the wire layout.

C. The inductors shall be far away from the signal line; the heat dissipation of the power supplement shall be adjusted to ensure the integrity of copper covering around the power supplement as far as possible.

And the heat dissipation through holes shall be drilled on the power supplement path to guide the heat emitted by the power supplement to the edge of the board as far as possible, and the screw holes shall be used for heat dissipation; the power supplement part shall be far away from the analog, differential and other sensitive signals.

D. Chip part, differential pair equal length processing; heat dissipation processing; power filter optimization; analog signal, clock signal and other signal lines requiring special processing and the spacing adjustment of surrounding signals;

E. Adjust the board layout through 3D viewing, you can observe whether there is physical interference between chips, chip and resistance& capacitance; check whether the silk screen is placed in the same direction; whether the direction marks of important chips are covered;

5. Fine Layout Adjustment for Double & Multilayer PCB

A. After the part layout adjustment, the DRC is used for detection. Firstly, the differential pairs are checked to see whether the equal length between the pairs is controlled within 50 mil and within the equal length of the pairs is controlled within 5 MIL;

B. The hole diameter shall be combined to detect the through-hole information on the board. Pay attention to the size of different through-holes used in the process of making the board, whether they meet the standards, and whether there are oil-filled through holes.

C. Whether the spatial interference of all devices need to be adjusted;

D. Whether the signal lines are equal in length.

E. After the completion of the checking, copper covering treatment is required. When copper covering treatment is conducted, the copper covering rules need to be modified, and the copper covering spacing setting needs to be modified; the redundant copper needs to be removed.

F. After the copper covering is completed, the grounding treatment shall be carried out for the large area copper to ensure that there is a grounding through a hole in one inch, so as to avoid the heat concentration of the board and the impact on the part circuits.

G. After adjusting the grounding through-hole, the DRC checking shall be carried out again to avoid new errors.

6. PCB Production Document Generation for Double & Multilayer PCB

A. To generate the production file Gerber, including Gerber files, drilling files, and coordinate files that are required by the PCB manufacturer. When generating finished, you need to hide the screen printing of smaller characters.

B. Hide small characters, you can select the right-click the characters you want to hide – find similar objects, select the same for string type and text height, click OK, and then click Hide (there are many other different applications in finding simple objects).

C. Generate Gerber files: File fabric outputs Gerber files.

D. Generate drilling files: File fabric outputs NC drilling files.

E. Component coordinate file: edit origin reset, file assembly outputs generate pick and place files, select text and imperial and OK

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