# Impedance control

With the increasing speed of PCB signal switching, today’s PCB designers need to understand and control the impedance of PCB trace lines. Corresponding to the shorter signal transmission time and higher clock rate of modern digital circuits, PCB trace lines are no longer simple connections, but transmission lines.

In practice, trace impedance should be controlled when the digital marginal velocity is higher than 1NS or the analog frequency is more than 300Mhz. One of the key parameters of a PCB trace line is its characteristic impedance (that is, the ratio of voltage to current as the wave travels along the signal transmission line). The characteristic impedance of the conductor on the printed circuit board is an important index in the design of the circuit board. Especially in the design of the HIGH-frequency circuit board, it must consider whether the characteristic impedance of the conductor is consistent with the characteristic impedance required by the device or the signal. This involves two concepts: impedance control and impedance matching. This paper focuses on impedance control and laminated design.

## The factors that determine the impedance

All kinds of signals can be transmitted in conductors in the circuit board. In order to increase the transmission rate, the frequency must be increased. Different factors such as etch, stack thickness, wire width, etc., can affect the impedance and distort the signal. Therefore, the conductor on the high-speed circuit board should have its impedance controlled within a certain range, which is called “impedance control”.

The impedance of the PCB trace line will be determined by its inductive and capacitive inductance, resistance, and conductivity coefficient. The main factors affecting PCB routing impedance are:

1. The width and thickness of the copper wire. The height of the kernel or prefilled material on either side of the trace;

2 dielectric constant of the medium, the thickness of the medium.

3. The thickness of the welding plate, the path of the ground wire, the wire around the wire, etc. The PCB impedance ranges from 25 to 120 ohms.

4. PCB multilayer composition. PCB transmission line usually consists of a conductor track, one or more reference layers and insulation materials. The trace and laminates constitute the control impedance. PCB will often have a multilayer structure, and control impedance can be constructed in a variety of ways. However, whatever method is used, the impedance value will be determined by the physical structure and the electrical properties of the insulating material, the configuration of the laminate;

5. Insulation constants for kernel and prefilled materials.

There are two main types of PCB transmission lines: Microstrip and Stripline.

### Microstrip

A microstrip line is a stripped wire, which refers to a transmission line with a reference plane only on one side. The top and the sides are exposed to air (or coated). It is located on the surface of the insulation constant Er circuit board and takes the power supply or the ground as a reference.

Note: In practical PCB manufacture, PCB manufacturers will usually coat the surface of PCB with green oil.

### Stripline

A ribbon line is a ribbon wire placed between two reference planes

The above two examples are just a typical demonstration of microstrip lines and strip lines. There are many kinds of specific microstrip lines and strip lines, such as coated microstrip lines, which are related to the laminated structure of specific PCB.

The equations used to calculate the characteristic impedance require complex mathematical calculations, usually using field solution methods, including boundary element analysis. Therefore, using the specialized impedance calculation software SI9000, what we need to do is to control the parameters of the characteristic impedance:

Dielectric constant Er, line width W1, W2 (trapezoid), line thickness T, and insulation layer thickness H.

Description of W1 and W2:

W1, W2 (trapezoid)

W is equal to W1, W1 is equal to W2.

Rules: W1 = W – A

W — Design line width

A — Etch Loss (see the table above)

The reason for the inconsistent width of the line is that the PCB board is corroded from top to bottom in the manufacturing process, so the corroded line is trapezoidal.

There is a corresponding relationship between the wire thickness T and the copper thickness of the layer, which is as follows:

Copper thickness:

COPPER THICKNESS

Base copper thickness

For inner layer For the outer layer

H OZ

0.6 mil 1.8 mil

1 OZ

1.2 MIL 2.5 MIL

2 OZ

2.4 MIL 3.6 MIL

Green oil thickness:

* Because the thickness of green oil has little influence on the impedance, it is assumed to be a constant value of 0.5mil.

We can control these parameters to achieve the purpose of impedance control. The following steps of impedance control and the use of SI9000 are illustrated with the example of THE baseboard PCB of Anvil:

The lamination of the PCB on the bottom plate is shown in the following figure:

Lamination of a baseplate PCB

The second layer is the ground plane, the fifth layer is the power plane, and the remaining layers are the signal layer.

The thickness of each layer is shown in the table below:

Layer Name, Type, Material Thickness Class SURFACE AIR TOP CONDUCTOR COPPER 0.5 OZ ROUTING DIELECTRIC FR – 4 3.800 MIL L2 – INNER CONDUCTOR 1 OZ COPPER PLANE DIELECTRIC FR 5.910 MIL L3 – INNER – 4 CONDUCTOR 1 OZ COPPER ROUTING DIELECTRIC FR – 4 33. O8MIL L4 – INNER CONDUCTOR 1 OZ COPPER ROUTING DIELECTRIC FR – 4 5.910 MIL L5 – INNER CONDUCTOR 1 OZ COPPER PLANE DIELECTRIC FR – 4 3.800 MIL BOTTOM ROUTING SURFACE AIR with CONDUCTOR COPPER 0.5 OZ

Description: The dielectric between each layer is FR-4 and its dielectric constant is 4.2. The top and bottom layers are bare and in direct contact with air, which has a dielectric constant of 1.

## The signals required for impedance control

1. DDR data line

2. The single-ended impedance is 50 ohms

3. The routing layer is TOP, L2, and L3, and the routing width is 5mil.

Clock signal CLK and USB data line, the differential impedance is controlled at 100 ohms, the routing layer is L2 and L3, the width of routing is 6mil, and the spacing of routing is 6mil.

Description of calculation accuracy:

1. For single-terminal impedance control, the calculated value is equal to the customer’s requirement;

2. Impedance control for other characteristics:

For all other impedance designs (including differential and characteristic impedance)

Below, SI9000 is used to calculate whether the impedance control requirements are met:

Firstly, the single-terminal impedance control of the DDR data line is calculated:

TOP layer: 0.5oz copper thickness, 5MIL wire width, 3.8mil distance from the reference plane, and 4.2 dielectric constants. Select the model, plug in the parameters, and select Lossless Calculation, as shown in the figure below:

SI9000 is used to calculate whether the impedance control requirements are met

The single-ended impedance was calculated as Zo=55.08ohm, which was 5 ohm different from the requirement. According to the feedback from the plate factory, they changed the routing width to 6MIL to achieve impedance control. After verification, in the case of width W2=6MIL and W1=7MIL, the calculated single-ended impedance was Zo=50.56 ohm, which met the design requirements.

L2 layer: The routing model at the L2 layer is shown in the figure below:

A routing model at the L2 level

The calculation results are shown in the figure below by substituting parameters:

PCB impedance control

The calculated single-end impedance is Zo=50.59 ohm, which meets the design requirements.

Similarly, the single-ended impedance of the L3 layer can be obtained, which will not be repeated here.

Differential impedance control is calculated as follows:

As can be seen from the PCB design, in the PCB of the bottom plate, the clock routing line is in The L3 layer, and the USB data line is in the L2 layer. The routing width is 6MIL, and the spacing is 6MIL.

The model of clock signal selection is as follows:

Model of clock signal selection

According to the data provided to the board factory, the calculated results are shown in the figure below:

PCB impedance control

According to the feedback from the plate factory, the differential impedance is only 85 ohms, which is close to the calculated result (they can adjust the thickness of the plate, but not the line). However, when the line spacing was changed to 12MIL, the calculated differential impedance was 92.97 ohms, and then when the line width was adjusted to 5MIL, the differential impedance was 98.99 ohms, which basically met the design requirements.

## PCB Impedance Control Experience summary

1. It is difficult to control differential impedance when differential routing is in the middle signal layer because the accuracy is not enough, that is to say, changing the thickness of the medium layer has little influence on differential impedance, and only changing the spacing of the routing has a great influence on differential impedance. However, when the wiring is at the top or bottom, the differential impedance is relatively easy to control, and it is easy to meet the design requirements. According to the actual calculation, it is better for important signal lines to go to the surface, which is easy to carry out impedance control, especially for clock signal differential pair.

2. Before PCB design, the laminated parameters of PCB must be determined by impedance calculation, such as the copper thickness of each layer, the thickness of the medium layer, etc., and width and spacing of differential routing should be calculated in advance. These are the front-end simulation of PCB to ensure that the impedance control of important signal lines meets the design requirements.

3. Questions about the dielectric constant Er:

Take the material board with FR-4 medium that we use most as an example: the actual multilayer board is made by stacking core board and the laminated resin layer, and the core board itself is also made by combining semi-cured sheet. The technical indexes of three commonly used semi-cured sheets are shown in Table 1 below.

The results are calculated according to the data provided to the board factory

The permittivity of the semi-cured sheet is not simple arithmetic mean, and the Er values are different even when forming microstrip lines and strip lines. On the other hand, the Er of FR-4 also changes with the change of signal frequency. However, the Er value of FR-4 material is generally considered to be about 4.2 when it is below 1GHz. 4.2 is usually used for calculation.

4, in the actual impedance control, generally USES the medium as FR – 4, the Er is about 4.2, line thickness t smaller influence on the impedance, the actual main can adjust the H and W, W (design line width) is generally determined by the designer, but should be considered in the design of the line width of impedance match and actual machining accuracy. Of course, the effect of line thickness T with a smaller value of W cannot be ignored. H (dielectric layer thickness) influence on the impedance control is the largest, the actual H there are two kinds of circumstances: one kind is core board, material suppliers provided the thickness of the plank of H is made up by the above three and a half curing piece, but it must be considered in the process of combination of the characteristics of three kinds of material, not unconditional any combination, so the thickness of the plank has certain rules, forming a corresponding listing, H also had certain restrictions. For example, the core board of 0.17mm 1/1 is 2116 ×1, and the core board of 0.4mm 1/1 is 1080×2+7628×1, etc. The other is the thickness of the laminated part of the laminate: the method is basically the same as before, but the loss of the copper layer should be noted. If the inner electric layer is filled with a semi-cured sheet, the thickness loss of the semi-cured sheet can be ignored because the copper foil is less etched in the process of making the inner layer, and the resin in the semi-cured sheet fills the area less. On the contrary, if the signal layer is filled with a semi-cured sheet, the thickness loss of the semi-cured sheet will be large and difficult to estimate due to a large amount of copper foil etched off. Therefore, it has been suggested that the signal layer in the inner layer requires copper laying to reduce thickness loss.

5. The characteristic impedance is inversely proportional to the width of the transmission line. The wider the width is, the lower the impedance is, and vice versa.

6. When the thickness of the plate is limited in the design requirements of some plates, it is very critical to adopt a good lamination design in order to achieve better impedance control. The following conclusions can be drawn from the actual calculation:

A. Each signal layer should be adjacent to a reference plane to ensure its impedance and signal quality;

B. Each power layer should have a complete ground plane adjacent to it so that the power supply performance can be better guaranteed;

7. Discussion on impedance control of line width and spacing of differential routing:

Through software calculation, it is found that changing the spacing of different pairs has a great influence on impedance control, but another problem is involved here, that is, the coupling problem of different pairs.

The main purpose of differential coupling is to enhance the anti-interference ability to the outside world and inhibit EMI. The coupling can be divided into tight coupling mode (i.e., the difference to line spacing is less than or equal to line width) and loose coupling mode.

If all surrounding routing lines can be ensured to be far away from the difference pair (for example, far more than 3 times of line width), then the differential routing need not be guaranteed to be tightly coupled, and the most important thing is to ensure that the routing length is equal. (See Johnson’s signal-integrity website for details on differential wiring, where he asks his layout engineers to keep the different lines far apart so they can be wound in different ways.) However, at present, most multilayer high-speed PCB boards have very tight routing space, so it is impossible to separate differential routing from another routing. Therefore, it is necessary to keep a tight coupling to increase anti-interference ability.

Tight coupling is not a necessary condition for differential routing, but it can enhance the anti-interference ability of differential routing when space is insufficient. Therefore, for the impedance control problem of differential pair, how to adjust each parameter needs to comprehensively consider the above factors and choose the best one. In general, it is not easy to adjust the distance and line width of different pairs.

## Extension Impedance Control: Differential PCB requirements for wiring

1. Determine the routing mode, parameters, and impedance calculation

Differential for the two modes, the outer layer microstrip differential mode, and the inner layer strip differential mode, the impedance can be calculated using the relevant impedance calculation software (such as POLAR-SI9000) or the impedance calculation formula by setting reasonable parameters.

2. Take parallel isometric lines

Determine the line width and spacing, when the line should be in strict accordance with the calculated line width and spacing, two-line spacing should always remain unchanged, that is, to keep parallel. There are two ways to go parallel: side-by-side and over-under.

Generally, try to avoid using the difference signal between the layers, namely because in the actual processing of PCB in the process, due to the cascading laminated alignment accuracy is much lower than provided between the etching precision, and in the process of laminated dielectric loss, cannot guarantee difference line spacing is equal to the thickness of the interlayer dielectric, will cause the difference between the layers of the difference of impedance change. It is recommended to use intra-layer differences as much as possible.

3. Tight coupling principle

It is better to follow the principle of tight coupling when calculating the line width and spacing, that is, the difference to the line spacing is less than or equal to the line width. When two differential signal lines are very close together, the currents travel in opposite directions, the magnetic fields cancel each other out, the electric fields are coupled, and the electromagnetic radiation is much less.

4. Go short and straight

In order to ensure the quality of the signal, the difference on the line should be as short and straight as possible, reduce the number of holes in the wiring, avoid the difference on the wiring is too long, too many bends, bends as far as possible with 45° or arc, to avoid 90° turns.

5. Processing between different line pairs

There is no limit to the choice of routing mode by difference. Both microstrip and strip lines can be used, but a good reference plane must be paid attention to. The spacing between different d

Differential lines should not be too small, at least more than 3 ~ 5 times the spacing between different lines. If necessary, hole isolation is added between

Differential line pairs to prevent cross-talk.

6. Stay away from other signals

For differential pair signals and other signals such as TTL signals, it is better to use different routing layers. If the same layer must be used for routing due to design constraints, the distance between differential pair and TTL should be far enough, at least greater than 3-5 times the distance between Differential lines.

7. Differential signals cannot be segmented across planes

Although the two differential signals are each other’s backflow path, cross-segmentation will not cut the backflow of the signal, but the transmission line across the segmented part will cause impedance discontinuity due to the lack of reference plane (as shown in the arrow in the figure, where GND1 and GND2 are adjacent ground planes or LVDS).

8. Explanation of each parameter in the PADS LAYOUT middle-level definition TAB:

Three commonly used semi-cured sheet technical indicators

Coating said coating layer if there is no coating layer, the thickness of 0, dielectric (dielectric constant) fill 1 (air).

Substrate refers to the substrate layer, that is, the dielectric layer, which is generally fr-4. The thickness is calculated by impedance calculation software, and the dielectric constant is 4.2 (when the frequency is less than 1GHz).

Click Weight(Oz) to set the thickness of the copper, which determines the thickness of the wire.

9. Concept of Prepreg/Core for insulation layer:

PP (PrePREg) is a kind of medium material, which is composed of glass fiber and epoxy resin. The core is actually a PP type medium, except that its two sides are covered with copper foil, while PP is not. When making multilayer boards, core and PP are usually used together, and PP is used to bond between core and core.

10. Matters needing attention in PCB lamination design:

(1) Warping problem

The laminated design of PCB should be symmetrical, that is, the medium thickness and copper thickness of each layer are symmetrical. Take the six-layer plate for example, the medium thickness of top-GND and bottom-Power is the same as the copper thickness, and the medium thickness of GND-L2 and L3-Power is the same as the copper thickness. So that you don’t warp when you laminate.

(2) The signal layer should be tightly coupled with the adjacent reference plane (that is, the medium thickness between the signal layer and the adjacent copper coating layer should be small); Copper for power and copper for ground should be tightly coupled.

(3) In the case of very high speed, extra layers can be added to isolate the signal layer, but it is recommended not to isolate multiple power layers, as this may cause unnecessary noise interference.

(4) Typical laminated design layer distribution is shown in the following table:

The Intermediate layer of the PADS LAYOUT defines the explanation of each parameter

(5) General principles of layering:

Below the component surface (the second layer) is the ground plane, which provides the device shielding layer and the reference plane for the top-level wiring;

All signal layers should be adjacent to the ground plane as far as possible;

Try to avoid the two signal layers directly adjacent;

The main power supply should be adjacent to it as far as possible;

The laminated structure is symmetrical.

For the floor arrangement of the motherboard, it is difficult for the existing motherboard to control the parallel long-distance wiring, for the board level operating frequency above 50MHZ

(The following situations of 50MHZ can be referred to and appropriately relaxed). The arrangement principle is suggested:

Component surface and welding surface are complete ground plane (shielding);

No adjacent parallel wiring layer;

All signal layers should be adjacent to the ground plane as far as possible;

The key signal is adjacent to the stratum and does not cross the segmentation zone.

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